From the course: Learning Verilog for FPGA Development

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Timing directives

Timing directives - FPGA Tutorial

From the course: Learning Verilog for FPGA Development

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Timing directives

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- [Instructor] As most Compiled Programming languages, very large support Compiler Directives, many of which you may already be familiar with if you are a C or C++ programmer. For example, we have the Define directive for defining symbols, so that the compiler replaces the symbols for their values later in the code. Here we are defining the symbol size to equal number four. Later in the code, we may use it in an if statement, for example. Now a unique detail in very low is that directives start with the grave accent character, which is not so common in other languages. Notice the grave accent at the beginning of the Define directive, and also at the beginning of the usage of the symbol size. Define directives are also useful for conditional inclusion of code with ifdef directives. Here we have a block that would be included if the symbol x is defined. We can also include entire files of code libraries with the Include…

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