From the course: Learning Verilog for FPGA Development

Unlock the full course today

Join today to access over 22,700 courses taught by industry experts or purchase this course individually.

Range specification

Range specification - FPGA Tutorial

From the course: Learning Verilog for FPGA Development

Start my 1-month free trial

Range specification

“

- [Instructor] Range specification is a very nice feature that allows you to create collections of elements, such as wire busses, register busses, and even arrays of gates. With range specification, you may also concatenate data and refer to data partially. Let me show you some practical examples. Registers and wires are often useful as multi-bit busses. Please be advised that the following coding examples are only for syntax purposes, although this module compiles correctly, it does not produce a meaningful simulation. In line 24, we have a wire bus named my_wire. The syntax is simple. First, specify the type, then the index range between square brackets with its bounds separated by a colon, and finally the name of the bus. The wires in this bus are numbered from seven to zero, including both, so it's a nate wire bus. Seven and zero here, means that the bus has a wire you can refer to as my_wire indexed at seven.…

Contents