From the course: Learning Verilog for FPGA Development

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Numbers and constants

Numbers and constants - FPGA Tutorial

From the course: Learning Verilog for FPGA Development

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Numbers and constants

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- [Instructor] Now it's time to talk about numbers and constants in Verilog. Since we are designing hardware, we're interested in each bit of data. So it makes sense to get to know the logic states a singe wire may exhibit. These states are zero which usually means a logical false state. One meaning true. Z meaning a high impedance state. This happens when we have an undriven or floating wire. Now, this is not an unwanted state. Remember that tri-state buffers may output this state to allow other buffers to drive a shared wire and lastly, we have x which may mean either an unknown state, for example, a registered value on startup or it may mean a don't care condition where the wire's value has no consequence on my logic. It's very important to know the difference between these states so here's a nice analogy. Suppose you're driving a car and reach an intersection with a traffic light and you intend to go straight…

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