From the course: Learning Verilog for FPGA Development
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Gate level - FPGA Tutorial
From the course: Learning Verilog for FPGA Development
Gate level
- Let's start with some of the coding elements at the gate level where the most prominent are, not surprisingly logic gates, all logic gate types, and/or XOR, Nand, and so on, are provided by the language as primitive modules, in very (mumbles) multi-input gates are defined with a variadic set of boards, which look like arguments in a function or method cole, the first board specified is the output and the rest are inputs. For example here's a three input Nand gate implemented in (mumbles) with it's corresponding schematic representation at the right, this instance is called my gate it's output is connected to a wire named X and it's inputs are connected to three wires name A, B and C respectively. Here's another example of three lines of code and it's schematic, this example employs a wire named temp to connect the two gates then we have a two input XOR gate with it's inputs at wires E and F, and it's output is connected to the temp…
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