From the course: Learning Verilog for FPGA Development
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Continuous assignments - FPGA Tutorial
From the course: Learning Verilog for FPGA Development
Continuous assignments
- [Instructor] At this point, we have seen some value assignments in the code, but you must know that varied log supports three very different types of assignments. First we have the continuous assignment and this is useful to hard wire a signal to a Boolean expression at all times. It uses the assign keyword and the equal operator. We also have the blocking assignment, which operates sequentially in procedural blogs. It uses the equal operator. And finally, there's the non-blocking assignment. This works concurrently within procedural blocks. It uses the left arrow operator. If you need to choose between blocking or non-blocking assignments, don't worry. There's a nice rule of thumb you may want to follow. Use blocking assignments for combinational logic, and non-blocking assignments for sequential logic. Now let me start by describing continuous assignments. Consider this module named Boolean, which implements a function…
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Contents
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Verilog modules4m 13s
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Instantiating modules4m 49s
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Gates and primitives3m 3s
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Registers and wires1m 46s
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Range specification4m 30s
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Numbers and constants4m 53s
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Always blocks52s
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The if-else statement2m 2s
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Case statements2m 24s
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Boolean algebra expressions56s
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Continuous assignments2m 23s
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Blocking assignments3m 20s
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Nonblocking assignments3m 49s
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Challenge: From schematic to code2m 16s
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Solution: From schematic to code4m 31s
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